1. Field of the Invention
The invention relates to a semiconductor device and a manufacturing method thereof. More specifically, the invention relates to a semiconductor package structure and a manufacturing method thereof.
2. Description of Related Art
The semiconductor package technique is categorized into various package types. The quad flat non-leaded (QFN) package belonging to the category of quad flat package and characterized in short signal transmission path and rapid signal transmission speed is suitable for high frequency (i.e., radio frequency bandwidth) chip package, and thus becomes one of the main options of low pin count package.
In a conventional method of manufacturing the quad flat non-leaded package structure, a plurality of chips are mounted on a patterned leadframe. Next, the chips are electrically connected to the leadframe via bonding wires. Thereafter, a portion of the leadframe, the bonding wires, and the chips are encapsulated by a molding compound. Finally, the aforementioned structure is singularized through punching or sawing to form a plurality of quad flat non-leaded package structures.
However, when the molding compound encapsulates the patterned leadframe, the molding compound easily overflows to a lower surface of leads because the leads of the leadframe contacts the molding compound directly and is co-planar with the molding compound, thereby affecting the electrical reliability of the leadframe. Furthermore, an extra redistribution layer (RDL) has to be created because the distance between the leads of the leadframe cannot be manufactured into a smaller distance, thus increasing the manufacturing cost.